ADC14BATMAP=ADC14BATMAP_0, ADC14CH3MAP=ADC14CH3MAP_0, ADC14CH1MAP=ADC14CH1MAP_0, ADC14TCMAP=ADC14TCMAP_0, ADC14RES=ADC14RES_0, ADC14DF=ADC14DF_0, ADC14REFBURST=ADC14REFBURST_0, ADC14CH2MAP=ADC14CH2MAP_0, ADC14PWRMD=ADC14PWRMD_0, ADC14CH0MAP=ADC14CH0MAP_0
Control 1 Register
ADC14PWRMD | ADC14 power modes 0 (ADC14PWRMD_0): Regular power mode for use with any resolution setting. Sample rate can be up to 1 Msps. 2 (ADC14PWRMD_2): Low-power mode for 12-bit, 10-bit, and 8-bit resolution settings. Sample rate must not exceed 200 ksps. |
ADC14REFBURST | ADC14 reference buffer burst 0 (ADC14REFBURST_0): ADC reference buffer on continuously 1 (ADC14REFBURST_1): ADC reference buffer on only during sample-and-conversion |
ADC14DF | ADC14 data read-back format 0 (ADC14DF_0): Binary unsigned. Theoretically, for ADC14DIF = 0 and 14-bit mode, the analog input voltage - V(REF) results in 0000h, and the analog input voltage + V(REF) results in 3FFFh 1 (ADC14DF_1): Signed binary (2s complement), left aligned. Theoretically, for ADC14DIF = 0 and 14-bit mode, the analog input voltage - V(REF) results in 8000h, and the analog input voltage + V(REF) results in 7FFCh |
ADC14RES | ADC14 resolution 0 (ADC14RES_0): 8 bit (9 clock cycle conversion time) 1 (ADC14RES_1): 10 bit (11 clock cycle conversion time) 2 (ADC14RES_2): 12 bit (14 clock cycle conversion time) 3 (ADC14RES_3): 14 bit (16 clock cycle conversion time) |
ADC14CSTARTADD | ADC14 conversion start address |
ADC14BATMAP | Controls 1/2 AVCC ADC input channel selection 0 (ADC14BATMAP_0): ADC internal 1/2 x AVCC channel is not selected for ADC 1 (ADC14BATMAP_1): ADC internal 1/2 x AVCC channel is selected for ADC input channel MAX |
ADC14TCMAP | Controls temperature sensor ADC input channel selection 0 (ADC14TCMAP_0): ADC internal temperature sensor channel is not selected for ADC 1 (ADC14TCMAP_1): ADC internal temperature sensor channel is selected for ADC input channel MAX-1 |
ADC14CH0MAP | Controls internal channel 0 selection to ADC input channel MAX-2 0 (ADC14CH0MAP_0): ADC input channel internal 0 is not selected 1 (ADC14CH0MAP_1): ADC input channel internal 0 is selected for ADC input channel MAX-2 |
ADC14CH1MAP | Controls internal channel 1 selection to ADC input channel MAX-3 0 (ADC14CH1MAP_0): ADC input channel internal 1 is not selected 1 (ADC14CH1MAP_1): ADC input channel internal 1 is selected for ADC input channel MAX-3 |
ADC14CH2MAP | Controls internal channel 2 selection to ADC input channel MAX-4 0 (ADC14CH2MAP_0): ADC input channel internal 2 is not selected 1 (ADC14CH2MAP_1): ADC input channel internal 2 is selected for ADC input channel MAX-4 |
ADC14CH3MAP | Controls internal channel 3 selection to ADC input channel MAX-5 0 (ADC14CH3MAP_0): ADC input channel internal 3 is not selected 1 (ADC14CH3MAP_1): ADC input channel internal 3 is selected for ADC input channel MAX-5 |